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tb62206fg toshiba bi cd process ic silicon monolithic t b62206fg bicd pwm 2 ? phase bipolar stepping motor driver the tb 62206fg is designed to drive a 2 ? phase bipolar s t epping motor. with bicd process technology, this device enables output withstand voltage of 40 v and maximum current of 1.8 a to be achieved. features ? bipolar stepping motor driver ic ? internal pwm current control ? 2 ? phase/1 ? 2 p hase excitation is available ? monolithic bi cd ic dmos fet used for output power transistor ? high voltage output and high current: 40 v/1.8 a (max) ? on ? chip thermal shutdown circuit, overcurrent protection circuit and power ? on reset circuit (por) ? package : hso p20?p?450?1.00 pin assignment . note: please be careful about the thermal conditions during use, like operating current , pcb conditions , ambient temperature, etc. this ic may be broken if it is soldered at wrongly rotated position because high voltage is applied to low voltage part. please be sure that 1pin position and pcb pattern is correct before soldering process. weight: 0.79 g (typ.) cr 1 v dd 2 vref a 3 vref b 4 r s b r s a 6 v m 7 ccp c 8 ccp b 9 ccp a 10 20 torue 18 enable b 17 enable a fin (gnd) 1 out a 14 phase b 13 phase a 16 out b 19 out b 12 out a 11 standby fin (gnd) 201 4 toshiba corporation 201 4 - 10- 01 1
tb62206fg block diagram standby enable a phase a phase b r s v m ccp c ccp b ccp a v dd chopper osc current level set current feedback ( 2) protection unit v ref enable v m v dd stepping motor input logic torque control v rs r s comp charge pump unit output (h - bridge) 2 o s c cr- clk converter output control (mixed decay control) tsd isd v ddr /v mr protect cr v m enable b tor ue standby 201 4 - 10- 01 2
tb62206fg function table phase enable out x out x x l off off h h h l l h l h x : don ' t care others pin name h l notes enable x output output off output is off regardless of its phase ? s state. phase x out x: h x out : h in high leve l, current flows out x x out standby motor operation enable all functions of the ic stopped when standby = l , output stopped while charge pomp stopped. torque 100% 71% high - level protection func tion (1) thermal shutdown circuit while tj = 1 50c , all outputs are off. to turn - on, change the state of the standby pin in the order of h, l, h. it has temperature hysteresis to prevent the output from oscillating. (? t = 3 5 c ) (2) por (power - on reset circuit: v m and v dd power supply monitor circuit) output is forcibly turned off until v m and v dd reach their specified levels. (3) isd output is forcibly turned off when current higher than the specified level flows in the output block. to turn - on, cha nge the state of the standby pin in the order of h, l, h. 201 4 - 10- 01 3
tb62206fg absolute maximum ratings (ta = characteristics symbol rating unit logic supply voltage v dd 7 v motor supply voltage v m 40 v output current (note 1) i out 1.8 a current detect pin voltage v rs v m 4.5 v v charge pump pin maximum voltage (ccp1 p in) v h v m + 7.0 v logic input v oltage (note 2) v in to v dd + 0.4 v power dissipation (note 3) p d 1.4 w (note 4) 3.2 operating temperature t opr ? 40 to 85 c storage temperature t stg ? 55 to 150 c junction temperature t j 150 c note 1: perform thermal calculations for the maximum current value under normal conditions. use the ic at 1. 5 a or less per phase. the current value maybe control l ed according to the ambient temperature or board conditions. note 2: input 7 v or less as v in note 3: measured for the ic only. (ta = 25 c) note 4 : measured when mounted on the board. (ta = 25 c) t a: ic ambient temperature t opr : ic ambient temperature when starting operation t j : ic chip temperature during operation t j (max) is controlled by tsd (thermal shut down circuit) operating range (ta = characteristics symbol test condition min typ. max unit power supply voltage v dd ? 4.5 5.0 5.5 v motor supply voltage v m v dd = 5.0 v, ccp1 = 0.22 f, ccp2 = 0.02 f 13 24 35 v output current i out (1) ta = 25 c, per phase ? 1.2 1.5 a lo gic input voltage v in ? gnd ? v dd v phase signal input frequency f phase v dd = 5.0 v ? 1.0 150 k hz chopping frequency f chop v dd = 5.0 v 50 100 150 k hz v ref r eference voltage v ref v m = 24 v, torque = 100% gnd 3.0 4.0 v current detect pin voltage v rs v dd = 5.0 v 0 1.0 4.5 v note 5: please design in consideration of the maximum current so that tj does not exceed 120 c . 201 4 - 10- 01 4
tb62206fg electrical characteristics 1 ( unless otherwise specified , ta = = = characteristics symbol test circuit test cond ition min typ. max unit input voltage high v in (h) dc data input pins 2.0 v dd v dd + 0.4 v low v in (l) gnd ? 0.4 gnd 0.8 input hysteresis voltage v in (his) dc data input pins 200 400 700 mv input current i in (h) dc data input pin which contains pull - down resistance 35 50 75 a i in (h) data input pin which contains no pull - down resistance ? ? 1.0 i in (l) ? ? 1.0 power dissipation (v dd p in ) i dd1 dc v dd = 5 v , all inputs connected to ground, logic, output all off 1.0 2.0 3.0 ma i dd2 output open , f phase = 1.0 khz logic active , v dd = 5 v , chargepump = charged 1.0 2.5 3.5 power dissipation (v m p in ) i m1 dc output open, all inputs connected to ground, logic, output all off , chargepump = no operation 1.0 2.0 3.0 ma i m2 out open , f phase = 1 k hz logic active , v dd = 5 v, v m = 24 v, output off , chargepump = charged 2.0 4.0 5.0 i m3 out open , f phase = 4 khz logic active , 100 khz chopping (emulation), output open, chargepump = charged ? 10 13 output standby current upper dc dc v rs = v m = 24 v , v out = 0 v , standby = h , phase = h ? 200 ? 150 ? a output bias current upper i ob dc v out = 0 v , standby = h ? 100 ? 50 ? a output leakage current lower i ol dc v rs = v m = ccpa = v out = 24 v , logic in = all = l ? ? 1.0 a comparator reference voltage ratio high ( r eference) v rs (h) dc v ref = 3.0 v , v ref (gain) = 1/5.0 torque = (h) = 100% set ? 100 ? % low v rs (l) v ref = 3.0 v , v ref (gain) = 1/5.0 torque = (l) = 71% set 66 71 76 output current differential ?i out1 dc dif ferences between output current channels ? 5 ? 5 % output current setting differential ?i out2 dc i out = 1000 ma ? 5 ? 5 % rs pin current i rs dc v rs = 24 v , v m = 24 v standby = l ? 1 2 a output transistor drain - source on - resistance r on ( d - s) 1 dc i out = 1.0 a , v dd = 5.0 v t j = 25 c , drain - source ? 0.5 0.6 ? r on (s - d) 1 i out = 1.0 a , v dd = 5.0 v t j = 25 c , source - drain ? 0.5 0.6 r on (d - s) 2 i out = 1.0 a , v dd = 5.0 v t j = 105 c , drain - source ? 0.6 0.75 r on (s - d) 2 i out = 1.0 a , v dd = 5.0 v t j = 105 c , source - drain ? 0.6 0.75 201 4 - 10- 01 5
tb62206fg electrical characteristics 2 ( unless otherwise specified , ta = = = characteristics symbol test circuit test condition min typ. max unit v ref input voltage v ref dc v m = 24 v , v dd = 5 v , standby = h , output on , phase = 1 khz gnd ? 4.0 v v ref input current i ref dc standby = h , output on , v m = 24 v , v dd = 5 v , v ref = 3.0 v 20 35 50 a v ref attenuation ratio v ref (gain) dc v m = 24 v , v dd = 5 v , standby = h , output on , v ref = 0.0 to 4.0 v 1/4.8 1/5.0 1/5.2 ? tsd temperature (note 1) t j tsd dc v dd = 5 v , v m = 24 v 130 ? 170 c tsd return temperature difference (note 1) ?t j tsd dc t j tsd = 130 to 170 c t j tsd ? 50 t j tsd ? 35 t j tsd ? 20 c v dd return voltage v ddr dc v m = 24 v , standby = h 2.0 3.0 4.0 v v m return voltage v mr dc v dd = 5 v , standby = h 8.0 9.0 10 v over current protected circuit operation current (note 2) isd ? v dd = 5 v , v m = 24 v ? 3.0 ? a note 1: thermal shut down (tsd) circuit when the ic junction temperature reaches the specified value and the tsd circuit is activated, the internal reset circuit is activated switching the outputs of both motors to off. when the temperature is set betw een 130 (min) to 170c (max), the tsd circuit operates. when the tsd circuit is activated, the charge pump is halted, and trotect pin outputs v dd voltage. even if the tsd circuit is activated and standby goes h l h instantaneously, t he ic is not reset until the ic junction temperature drops ? 20 c (typ.) below the tsd operating temperature (hysteresis function). note 2: overcurrent protection circuit when current exceeding the specified value flows to the output, the internal reset cir cuit is activated, and the isd turns off the output. until the standby signal goes low to high , the overcurrent protection circuit remains activated. during isd, ic turns standby mode and the charge pump halts. 201 4 - 10- 01 6
tb62206fg ac elect rical characteristics (ta = = = ? characteristics symbol test circuit test condition min typ. max unit clock frequency f phase ac ? ? ? 166 khz minimum clock pulse width tw (tclk) ? 100 ? ns twp ? ? 0 ? ? twn ac ? 0 ? ? output trans istor switching characteristic t r ? output load : 6.8 mh/5.7 ? ? 100 ? ns t f ? ? ? 100 ? t plh ? phase to out ? 1000 ? t phl ? output load : 6.8 mh/5.7 ? ? 2000 ? t plh ? cr to out ? 500 ? t phl ? output load : 6.8 mh/5.7 ? ? 1000 ? noise rejectio n dead band time t brank ? i out = 1.0 a 200 300 500 ns cr reference signal oscillation frequency f cr ? c osc = 560 pf, r osc = 3.6 k ? ? 800 ? khz chopping frequency possible range f chop (min) f chop (max) ? v m = 24 v, v dd = 5 v, output active (i out = 1.0 a) step fixed, ccp1 = 0.22 f, ccp 2 = 0.0 22 f 40 100 150 khz chopping set frequency f chop ? output active (i out = 1.0 a), cr clk = 800 khz ? 100 ? khz charge pump rise time t ong ? ccp 1 = 0.22 f, ccp 2 = 0.022 f v m = 24 v, v dd = 5 v, standby = l h ? 100 200 s 201 4 - 10- 01 7
tb62206fg cur rent waveform and setting of mixed decay mode to control the constant current, the rate of mixed decay mode which determines current amplitude ( ripple current) should be 37.5%. mixed decay mode waveform ( current waveform ) nf f chop 37 .5% mixed decay mode cr pin internal clk waveform charge mode mixed decay timing fast mode c harge mode set current value mdt decay mode 1 nf nf 2 mied decay mode i nternal cr clk sig nal i out f chop f chop set current value set current value rnf mdt (mied decay timing) point: 37. fixed 201 4 - 10- 01 8
tb62206fg phase signal, internal cr c lk, and output current waveform (when phase signal is input in 2 phase excitation mode ) 37.5 mixed decay mode phase signal input f chop reset cr - clk counter here f chop f chop set current value i out set current value nf 0 mdt nf 201 4 - 10- 01 9
tb62206fg current discharge path when enable input during operation in slow mode, when all output transistors are forced to switch off, coil energy is discharged in the follow ing modes: note : parasitic diodes are located on dotted lines. in normal mixed decay mode, the current does not flow to the parasitic diodes. as shown in the figure above , an output transistor has parasitic diodes. to discharge energy from the coil, each transistor is switched on allowing current to flow in the reverse direction to that in normal operati on. as a result, the parasitic diodes are not used. if all the output transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes. u1 l1 u2 l2 pgnd off off u1 l1 u2 l2 off on (note) load pgnd u1 l1 u2 l2 off off (note) load pgnd (note) r s pin r rs v m on on load charge mode slow mode forced o ff mode on r s pin r rs v m r s pin r rs v m off off enable off off 201 4 - 10- 01 10
tb62206fg output transistor operating mode output transistor operatio n functions mode tr u1 u2 l1 l2 charge on off off on slow off off on on fast off on on off note : the above table is an example where current flows in the direction of the arrows in the above figures. when the current flows in the opposite direc tion of the arrows, see the table below. mode tr u1 u2 l1 l2 charge off on on off slow off off on on fast on off off on in this ic, three modes as shown above are automatically switched to control the constant current. u1 l1 u2 l2 pgnd off off u1 l1 u2 l2 off on on (note) load pgnd u1 l1 u2 l2 (note) load pgnd (note) r s pin r rs v m on on load charge mode current flows into the coil. slow mode current flows between the coil and the ic. fast mode the energy in the coil flows back to the power supply. on r s pin r rs v m r s pin r rs v m off off on off 201 4 - 10- 01 11
tb62206fg power supply sequence ( r ecommended) note 1 : if the v dd drops to the level of the v ddr or below while the specified voltage is input to the v m pin, the ic is internally reset. this is a protective measure against malfunction. likewise, if the v m drops to the level of the v mr or below while regulation voltage is input to the v dd , the ic is internally reset as a protective measure against malfunction. to avoid malfunction, when turning on v m or v dd , to input the standby signal at the above timing is recommended . it takes time for the output control charge pump circuit to stabilize. wait up to t ong time after power on before driving the motors. note 2: when the v m value is between 8 to 11 v, the internal reset is released, thus output may be on. in such a case, t he charge pump cannot drive stably because of insufficient voltage. the standby state should be maintained until v m reaches 13 v or more. note 3: since v dd = 0 v and v m = voltage within the rating are applied, output is turned off by internal reset. at th at time, a current of several ma flows due to the pass between v m and v dd . when voltage increases on v dd output, make sure that specified voltage is input. v dd ( max ) v dd ( min ) v ddr gnd v dd v m v m ( min ) v mr gnd v m active non - active internal operabl e h l standby i nput (note 1) takes up to t ong until operable. non - operable area standby 201 4 - 10- 01 12
tb62206fg how to calculate set current this ic drives the motor, controlling the pwm constant current in refe rence to the frequency of cr oscillator. at that time, the maximum current value (set current value) can be determined by setting the sensing resistor (r rs ) and reference voltage (v ref ). 100(%) x ) ( rs r 71%) 100, (torque torque x (v) ref v x 5.0 1 (max) out i ? = = 1/5.0 is v ref (gain): v ref attenuation ra tio. ( f or the specifications, see the electrical characteristics.) for example, when applying v ref = 3 v and torque = 100% to drive o ut i out of 0.8 a , r rs = 0.75 ? (0.5 w or more) is required. (for 1 - 2 phase excitation with 71% of torque, the peak current should be set to 100%). how to calculate the chopping and osc frequencies at constant current control, this ic chops frequency using the oscillation waveform (saw tooth waveform) determined by external capacitor and resistor as a reference. the tb6220 6 fg requires an oscillation frequency of eight times the chopping frequency. the oscillation frequency is calculated as follows: c) 600 r (c 0.523 1 f cr + = = 560 pf and r osc = 3.6 k ? are connected, f cr = 813 khz . at this time, the chopping frequency f chop is calculated as follows: f chop = f cr /8 = 101 khz 201 4 - 10- 01 13
tb62206fg ic power dissipation ic power dissipation is classified into two: power consumed by transistors in the o utput block and power consumed by the logic block and the charge pump circuit. ? power consumed by the power transistor (calculated with r on = 0.60 ? ) ? in charge mode, fast decay mode, or slow decay mode, power is consumed by the upper and lower transistors o f the h bridges. the following expression expresses the power consumed by the transistors of a h bridge. p (out) = 2 (t r ) i out (a) v ds (v) = 2 i out 2 r on .............................. (1) the average power dissipation for output under 4 - bit micro step operation (phase differe nce between phases a and b is 90) is determined by expression (1). thus, power dissipation for output per unit is determined as follows (2) under the conditions below. r on = 0.60 ? ( 1.0 a) i out (peak: max) = 1.0 a v m = 24 v v dd = 5 v p (out) = 2 (t r ) 1.0 2 (a) 0.60 2 ( ? ) = 2.4 0 (w) ........................................ (2) power consumed by the logic block and im the following standard values are used as power dissipation of the logic block and im at operation. i (logic) = 2.5 ma (typ.): i (i m3 ) = 1 0 .0 ma (typ.): operation/unit i (i m 1 ) = 2 .0 ma (typ.): stop/unit the logic block is connected to v dd (5 v). im (total of current consumed by the circuits connected to v m and current consumed by output switching) is connected to v m (24 v). power dissipation is calculated as follows: p (log ic&im) = 5 (v) 0.00 25 (a) + 24 (v) 0.01 0 (a) = 0. 25 (w) ............... (3) thus, the total power dissipation (p) is p = p (out) + p (logic&im) = 2. 65 (w) power dissipation at standby is determined as follows: p (standby) + p (out) = 24 (v) 0.00 2 (a) + 5 (v) 0.00 25 (a) = 0. 06 (w) for thermal design on the board, evaluate by mounting the ic. 201 4 - 10- 01 14
tb62206fg test waveforms phase t phase t plh t phl v m gnd t r t f 10% 50% 90% 90% 50% 10% figure 1 timing waveforms and names 201 4 - 10- 01 15
tb62206fg osc - charge delay : because the rising edge level of the osc waveform is used for converting the osc waveform to the internal cr clk, a delay of up to 1.25 ns (@f chop = 100 khz: f cr = 400 khz) occurs between the osc waveform and the internal cr clk. cr waveform internal cr clk waveform cr - cr clk delay figure 2 timing w aveforms and names (cr and output) t chop osc - c harge delay h l set current osc - fast delay osc (cr) 50% 50% l h h l l charge 50% slow fast output voltage a output voltage a output current 201 4 - 10- 01 16
tb62206fg p d ? ta (package power dissipation) (4) hsop20 r th (j - a) only (96 c/w) (5) when mounted on the board (140 mm 70 mm 1.6 mm: 38 c/w: typ.: under evaluation) note: r th (j - c ) : 8.5 c/w transient thermal resistance at soldering process depends on the pcb condition to be used. please pay attention to the thermal conditions when designing pcb, and be sure to check the thermal conditions at the actual evaluation. ambient temperature ta ( c) p d ? ta power dissipation p d (w) (2) (1) 0 0 3.5 25 50 75 100 125 150 0.5 1 1.5 2 2.5 3 201 4 - 10- 01 17
tb62206fg relationship between v m and v h ( charge pump voltage ) note: v dd = 5 v v m ? v h ( & vcharge up) v h voltage, charge up voltage (v) supply voltage v m (v) charge pump voltage v h = v dd + v m ( = ccp a) (v) 10 20 0 0 v h voltage charge up voltage v m voltage 2 3 10 20 30 40 4 5 6 7 8 9 11 12 13 14 15 16 17 18 21 22 23 24 25 26 19 27 28 29 31 32 33 34 35 36 37 38 39 1 30 40 50 input standby v mr charge pump output voltage v m voltage operation area absolute maximum rating absolute maximum rating 201 4 - 10- 01 18
tb62206fg oper ation of charge pump circuit ? initial charging (1) when reset is released, t r1 is turned on and t r2 turned off. ccp 2 is charged from ccp 2 via di1 . (2) t r1 is turned off, t r2 is turned on, and ccp 1 is charged from ccp 2 via di2. (3) when the voltage difference betw een v m and v h (ccp a pin voltage = charge pump voltage) reaches v dd or higher, operation halts (steady state ). ? actual operation (4) ccp 1 charge is used at f chop switching and the v h potential drops. (5) charges up by (1) and (2) above. output switching initial chargi ng steady state (1) (2) (3) (4) t (5) (4) (5) v h v m v h = v m + v dd = charge pump voltage i1 = charge pump output current i2 = gate bl ock power dissipation v dd = 5 v v m = 24 v comparator & controller v m output output h switch i2 ccp 1 0.22 f ccp a ccp b ccp c r 1 v h r s r rs ccp 2 0.0 22 f di2 di1 di3 v z i1 (2) t r1 t r2 7 (1) (2) 201 4 - 10- 01 19
tb62206fg charge pump rise time t ong : delay t ime taken for capacitor ccp 2 (charging capacitor) to fill up ccp 1 ( storing capacitor) to v m + v dd after standby is released. the internal ic cannot drive the gates correctly until the voltage of ccp 1 reaches v m + v dd . be sure to wait for t ong or longer before driving the motors. basically, the larger the ccp 1 capacitance, the smaller the voltage fluctuation , though the initial charge up time is longer . the smaller the ccp 1 capacitance, the shorter the initial charge - up time but the voltage fluctuation is larger . depending on the combination of capacitors (especially with small capacitance), voltage may not be sufficiently boosted. when the voltage does not increase sufficiently, output dmos r on turns lower than the norm al, and it raises the temperature. thus, use the capacitors under the capacitor combination conditions (ccp 1 = 0.22 f, c c p 2 = 0.022 f) recommended by toshiba. 50% v dd + v m v m + (v dd 90%) ccp 1 voltage v m 5 v 0 v standby t ong 201 4 - 10- 01 20
tb62206fg overcurrent shutdown (isd) circuitry isd dead time and isd on - time figure for reference: timing chart in case the over current flows in the motor. the overcurrent shutdown (isd) circuitry has a dead time to prevent false detection by the spike current in switching. the dead time synchronizes with the frequency of osc (osc_m) for configuration of chopping frequency. it is configured as follows. time from the flow of the over current to the output steps to the stop of the output is as follows. dead time = 4 fosc_m frequency in setting, min: 4 fosc_m frequen cy max: 8 fosc_m frequency (+ synchronizing time +1fosc_m time) it should be noted that these values assume a case in which an overcurrent condition is detected in an ideal manner. the isd circuitry might not work, depending on the control timing of the output transistors. therefore, a protection fuse must always be added to the v m power supply as a safety precaution. the optimal fuse capacitance varies with usage conditions, and one that does not adversely affect the motor operation or exceed the power dissipation rating of the tb62206fg should be selected. min max min max fosc (osc_m) fosc oscillation (chopper waveform) an overcurrent starts to flow into the output transistors. (dead time) tisd(mask) isd on - time 201 4 - 10- 01 21
tb62206fg external capacitor for charge pump when driving the stepping motor with v dd = 5 v, f chop = 150 khz, l = 10 mh under the conditions of v m = 13 v and 1.5 a, the logical values for ccp 1 and ccp 2 are as shown in the graph below: choose ccp 1 and ccp 2 to be combined from the above applicable range. we recommend ccp 1 : ccp 2 at 10 : 1 or more. ( i f our recommended values ( ccp 1 = 0.22 f, c c p 2 = 0.0 22 f ) are used, the drive conditions in the spe cification sheet are satisfied. ( t here is no capacitor temperature characteristic as a condition.) when setting the constants, make sure that the charge pump voltage is not below the specified value and set the constants with a margin (the larger ccp 1 an d ccp 2, the more the margin). some capacitors exhibit a large change in capacitance according to the temperature. make sure the above capacitance is obtained under the usage environment temperature. ccp 1 capacitance ( f) ccp 1 ? ccp 2 ccp 2 capacitance ( f) 0.05 0 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 0.1 0. 15 0.2 0.25 0.35 0.4 0.45 0.5 0.3 applicable range recommended value 201 4 - 10- 01 22
tb62206fg driving mode 2 - phase excitation mode in 2 - phase exc itation, enable is always high 100 0 phase b phase a [%] ? 100 step phase b phase a -150 -100 -50 0 50 100 150 -150 -100 -50 0 50 100 150 a b phase a phase b
tb62206fg 1 -2 phase excitation -150 -100 -50 0 50 100 150 -150 -100 -50 0 50 100 150 a b phase b phase a enable b enable a phase b phase a 100 0 [%] ? 100 step phase a phase b
tb62206fg sequence examples including reverse (1/2 step) phase b phase a enable b enable a ccw cw a b 100 100 - 100 - 100 r s t u v w x 0 ? .... wxqrsr [4/k33sr qx .... ??M ? ?????? ?? stop pha se b phase a enable b enable a ccw cw : dont care a b 100 100 - 100 - 100 r s t u v w x q r s t u v w x q r s u v w x 0 electrical angle representation of the sequence q t s time (step) st ep proceeded to ? .. w xqrs , and is reversed. this is an example of progress to ??? .. ? . second time is a reversal point. stop 201 4 - 10- 01 25
tb62206fg application circuit (example) the values for the respective devices are all recommended values. for values under each input condition, see the above - mentioned recommended operating conditions. n ote: adding bypass capacitors is recommended . make sure that gnd wiring has only one contact point, and to design the pattern that allows the heat radiation. to control setting pins in each mode by sw, make sure to pull down or pull up them to avoid high i mpedance. to input the data , see the section on the recommended input data. the ic may be destroyed due to short circuit between output pins, an out put pin and the v dd pin, or an output pin and the gnd pin. design an output line, v dd (v m ) line and gnd line with great care. also a low - withstand - voltage device may be destroyed when mounted in the wrong orientation, which causes high - withstanding voltage to be applied to the device. m r osc = 3.6 k : c osc 5 60 pf v ref a v m r rs a a b a b r rs b fin phase a eanble b enable a phase b standby fin v dd cr v ref ab 3 v 1 p f sgnd r rs a 0.66 : stepping motor 0.66 ? r rs b sg nd sgnd sgnd 5 v 10 p f ccp c ccp b ccp a ccp 2 0.0 22 f ccp 1 0.22 f torque 0 v 24 v sgnd 100 f 5 v 0 v 5 v 0 v 5 v 0 v 5 v 0 v 5 v 0 v 5 v pgnd v ref b 201 4 - 10- 01 26
tb62206fg package dimensions weight: 0.79 g (typ.) 201 4 - 10- 01 27
tb62206fg notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any licen se to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1 ] the absolute absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a mo ment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [ 2 ] use an appropriate power supply fuse to ensure that a large current does not c ontinuously flow in case of over current and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or loa d, causing a large current to continuously flow and the breakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit locati on, are required. [ 3 ] if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the n egative current resulting from the back el ectromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built - in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. [4] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwis e, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is ap plied the current with inserting in the wrong orientation or incorrectly even just one time. 201 4 - 10- 01 28
tb62206fg [ 5 ] carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and re gulator. if there is a large amount of leakage current such as input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is connected to a speaker with low input withstand voltage, overcurrent or ic failure can c ause smoke or ignition. (the over current can cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection type ic that inputs output dc voltage to a speaker directly. points to remember on handling of ics (1) over current protection circuit over current protection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circumstances. if the over current protection circuits operate against the over cur rent, clear the over current status immediately. depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the over current protection circuit to not operate properly or ic breakdown before operation. in add ition, depending on the method of use and usage conditions, if over current continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. (2) thermal shutdown circuit thermal shutdown circuits do not necessarily prot ect ics under all circumstances. if the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or ic breakdown before operation. (3) heat radiation design in using an ic with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated , not to exceed the specified junction temperature (t j ) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (4) back - emf when a motor rotates in the reverse direction, stops or slows down abruptly , a current flow back to the motor s power su pply due to the effect of back - emf. if the current sink capability of the power supply is small, the device s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings . to avoid this problem, take the effect of back - emf into consideration in system design. 201 4 - 10- 01 29
tb62206fg restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the i nformation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reprod uction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and sa feguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this doc ument, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used w ith or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this produ ct in such design or applications; (b) evaluating and determi ning the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operat ing parameters for such designs and application s. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or fail ure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or ex plosions, safety devic es, elevators and escalators, devices related to electric power, and equipment used in finance - related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse - engineer, alter, modify, translate or copy product, whether in whole or in part. ? product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited unde r any appl icable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for a ny infringement of patents or any other intellectual property rights of third parties that may result from the use of product. no license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation, indirect, consequential, special, or incidental damages or loss, including without limitation, loss of profits, loss of oppo rtunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions related to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular p urpose, accuracy of information, or noninfringement. ? do not use or otherwise make available product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). product and related software and technology may be controlled under the applicable export laws and regulations including, without limitation, the japanes e foreign exchange and foreign trade law and the u.s. export administration regulations. export and re - export of product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. ? pleas e contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of product . please use product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled su bsta nces, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losse s occurring as a resul t of noncompliance w ith applicable laws and regulations. 201 4 - 10- 01 30

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